1. Field of the Invention
The present invention relates to a static induction type semiconductor device, and, more particularly, to a static induction type semiconductor device of a surface gate type which is used with high density current.
2. Description of the Related Art
Static induction type semiconductor devices have been used as power switching devices to control large currents. These semiconductor devices have a significantly large ratio of the main current to the control current, or a large current gain. One such conventional static induction transistor (hereinafter referred to as "SIT") of a surface gate type, is shown in FIGS. 5 and 6. The illustrated SIT is an n-channel surface gate type transistor in which electrons act as major carriers. An n.sup.+ type silicon substrate 21 forms a drain region. Formed on that substrate 21 is an n.sup.- type epitaxial layer 22. An n.sup.+ type source region 23 and a p.sup.+ type gate region 24 are formed on the surface of the epitaxial layer 22. An SiO.sub.2 insulator layer 25 is formed on the epitaxial layer 22 and substantially covers the gate region 24 and the epitaxial layer 22.
A source electrode 27 is formed on the insulation layer 25, and has a source contact region 26 which is formed on the bottom side of the source electrode 27, and which penetrates (extends through) the insulation layer 25. The source electrode 27 is connected to the source region 23 via the source contact region 26. A drain terminal D is formed on the back side of the silicon substrate 21. Part of the epitaxial layer 22 which lies under the source region 23 forms a channel region 28. A p type impurity is implanted or diffused in the channel region 28 as needed, to form a potential barrier for inhibiting the movement of the carriers.
This SIT is in an OFF or inactive state when no forward bias voltage is applied between the gate and the source. Upon application of the forward bias voltage, holes are injected into the channel region 28 from the gate to lower the potential of the channel region 28. This induces electron injection from the source to the drain, and causes the electrons to flow from the source to the drain for activating the SIT.
The conventional SIT illustrated in FIG. 6 has one contact region for each source region 23. The source contact region extends substantially over the entire source region 23. The contact region is large enough to allow the holes to flow from the gate to the source electrode, and to prevent the hole density in the channel region from becoming too large. As a result, the potential variation in the channel region does not permit the electrons injected from the source to become too large. In other words, the conventional SIT has a low current gain h.sub.FS (the ratio I.sub.D /I.sub.G of the drain current I.sub.D to the gate current I.sub.G).
A static induction type semiconductor device which divides a source region surrounded by a gate region into two or more regions has already been proposed in the Japanese Unexamined Patent Publication No. 1-270276 in an attempt to increase the current gain of the transistor. However, the division of the source region without changing the overall area of the semiconductor device, tends to reduce the total area of the source region, which may cause local current concentration in the SIT device.